Integrated circuits (IC's) typically include a large number of components, particularly transistors. One type of transistor is a metal-oxide-semiconductor field-effect-transistor (MOSFET). MOSFET devices typically include a gate structure on top of a semiconductor substrate. Both sides of the gate structure are doped to form source and drain regions. A channel is formed between the source and drain regions beneath the gate. Based on a voltage bias applied to the gate, electric current may either be allowed to flow through the channel or be inhibited from doing so.
In some cases, the channel may be formed as a fin-like structure (herein “fin”). Such a fin protrudes beyond a top surface of the substrate and runs perpendicular to the gate structure formed on the substrate and the fin. In general, a field-effect-transistor using such a fin as a channel is referred to as a fin field-effect-transistor (“FinFET”). As mentioned above, an IC typically includes plural transistors, e.g., FinFET's. The plural FinFET's of the IC may each have a respective threshold voltage (Vth) so as to allow the IC to be used in various applications. For example, some of the plural FinFET's may have a relatively higher Vth, and some of the FinFET's may have a relatively lower Vth. A FinFET's Vth may be defined by various factors, one of which is a doping concentration of the FinFET's respective fin channel. The doping concentration of the fin channel is typically determined based on an energy level (generally in the unit of keV) used by an ion implantation process to dope the fin channel. More specifically, the ion implantation process includes bombarding plural dopants that are energized at that particular energy level on the fin channel so as to implant the dopants into the fin channel. As such, the fin channel may be doped with a corresponding doping concentration. However, when the energized dopants bombard the fin channel, the fin channel and a respective gate dielectric layer (generally formed over the fin channel) may be damaged. For example, various defects may be formed on the fin channel and/or the gate dielectric layer, which disadvantageously impacts overall performance and reliability (e.g., mobility, on/off ratio, etc.) of the FinFET. Thus, conventional techniques to dope a fin channel of a FinFET are not entirely satisfactory.